I want to achieve LVDS_RX in Cyclone V devices, is the 100 Ω differential termination resistor built into the FPGA?
Tools: Quartus® II
Device: Cyclone® V
Category: Device (I/O)
Cyclone V devices have 100 Ω On-Chip Termination inside the FPGA on all I/O bank differential input pins and support True LVDS with On-Chip Termination (Rd) To do.
At that time, in the Assignment Editor,
To : <input pin>
Assignment Name : Input Termination
Value: Differential
Please compile with the following restrictions.
After compiling, check that Termination is Differential in Fitter ⇒ Resource Section ⇒ Input Pins in the compilation report.
For more information, please refer to the device handbook below.
https://www.altera.com/en_US/pdfs/literature/hb/cyclone-v/cv_5v2.pdf
* Search for "Differential I/O Termination for Cyclone V Devices".
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