I want to implement LVDS_RX on my Arria V device. Does the FPGA have a built-in 100 Ω differential termination resistor?

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I want to achieve LVDS_RX on Arria V devices, is the 100 Ω differential termination resistor built into the FPGA?

Device family: Arria V
Category: I/O

Arria V devices have 100 Ω On-Chip Termination inside the FPGA on all I/O bank differential input pins and support True LVDS with On-Chip Termination (Rd) To do.

At that time, in the Assignment Editor,

To : <input pin>
Assignment Name : Input Termination
Value: Differential

Please compile with the following restrictions.
After compiling, check that Termination is Differential in Fitter ⇒ Resource Section ⇒ Input Pins in the compilation report.

For more information, please refer to the device handbook below.

High-Speed Differential I/O Interfaces and DPA in Arria V Devices
* Search for "Differential I/O Termination".

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