I want to implement LVDS_RX in Stratix V devices, but does the FPGA have a 100 Ω differential termination resistor built in?

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I want to achieve LVDS_RX in Stratix V devices, is the 100 Ω differential termination resistor built into the FPGA?

Device: Stratix V
Category: Device (I/O)

Stratix V devices have 100 Ω On-Chip Termination inside the FPGA on differential input pins in all I/O banks, supporting True LVDS with On-Chip Termination (Rd) To do.

At that time, in the Assignment Editor,

To : <input pin>
Assignment Name : Input Termination
Value: Differential

Please compile with the following restrictions.
After compiling, check that Termination is set to Differential in Fitter ⇒ Resource Section ⇒ Input Pins in the compilation report.

For more information, please refer to the device handbook below.
https://www.altera.com/en_US/pdfs/literature/hb/stratix-v/stx5_core.pdf
* Search for "Differential I/O Termination".

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