How is the clock for the ARM core of the Altera SoC Hard Processor System (HPS) set?

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How are the clocks set to the ARM cores in the Altera SoC Hard Processor System (HPS)?

SoC FPGAs

Using OSC1 as an input clock, a clock is generated by the PLL inside the HPS.

Note that since the PLL settings are executed by the Preloader, the ARM core will not operate at 800MHz until the PLL settings are reflected by the Preloader.

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