ALTLVDS_RX was generated in External PLL mode. Enabling the rx_data_reset pin results in a compilation error. Please tell me the measures. I am using Quartus II v11.1.

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I generated ALTLVDS_RX in External PLL mode. Enabling the rx_data_reset pin causes a compilation error. Please tell me the measures. I am using Quartus II v11.1.

IP clock/PLL

Error message:
Error (287102): Input pin "rx_data_reset" cannot be assigned a value
Error (287103): Input port "auto_generated.rx_data_reset" cannot be used as a value
Error (287103): Input port "auto_generated.rx_data_reset" cannot be used as a value

This error can be avoided by upgrading to Quartus II v12.0.

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