We are considering a PCI-Express interface using a device equipped with Altera's PCI-Express hard IP. When I started working with the Avalon-MM construction method using Qsys, after starting Qsys, selecting Library -> Interface Protocols -> PCI -> IP Compiler for PCI Express, and moving to the parameter setting screen. , if the following settings are made, an error will be thrown out as an invalid value.

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We are considering PCI-Express interface in Altera's PCI-Express hard IP-equipped device. After starting work with the construction method in Avalon-MM using Qsys, after starting Qsys, selecting Library -> Interface Protocols -> PCI -> IP Compiler for PCI Express and moving to the parameter setting screen , the following setting will output an error as an invalid value.

PCI Express Platform Designer

We are considering PCI-Express interface in Altera's PCI-Express hard IP-equipped device. After starting work with the construction method in Avalon-MM using Qsys, after starting Qsys, selecting Library -> Interface Protocols -> PCI -> IP Compiler for PCI Express and moving to the parameter setting screen ,
BAR0:1 64bit prefetchable
where it is
BAR0 32bit non-prefetchable
BAR1 32bit non-prefetchable
However, the Avalon Base Address of BAR0 is "0x00000001" and an error is output as an invalid value.

BAR address settings are automatically allocated according to the size of the slave peripheral connected to the BAR on Qsys. When you set BAR, an error will be displayed, but please proceed without worrying about it. The error should go away when you connect the slave peripheral.

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