For MAX II / MAX V devices, set Input Delay from Pin to Internal Cells to input pins in the Quartus II Assignment Editor. Please tell me how to check if the settings have been reflected.

First, this setting is the Quartus II Default setting is "ON".

You can check it from Table of Contents in Compilation Report.

Select Fitter ⇒ Resource Section ⇒ Delay Chain Summary
ON when Pad to Core 0 is (1)

You can also check it by following the steps below.
1. Right-click the Top module in the Quartus II (Project Navigator) and select
Click Locate ⇒ locate in Resource Property Editor
2. Click on the Node's IO_PIN(s) tab and check the desired pin Box
3. Can be confirmed by right-clicking the ΔT block
(You can also check the Input Pin to Logic Array Delay in the same window.)