When implementing Intel Nios® II in Qsys, there are columns called Number of tightly coupled instruction master port(s) and Number of tightly coupled data master port(s) in the Caches and Memory Interfaces tab. What are these?

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Intel: When implementing Nios® II in Qsys, on the Caches and Memory Interfaces tab, there are columns called Number of tightly coupled instruction master port(s) and Number of tightly coupled data master port(s). is it?

Nios II

Category: Nios® II
Tools: Quartus® Prime
device:-

There is memory called Tightly Coupled Memory, which is called Tightly Coupled Memory (TCM).
It is also used in the ARM architecture, etc.

Since the dedicated TCM bus is directly connected to the processor core, high-speed access is performed without going through the CPU bus. For Nios® II, on-chip memory essentially takes over the role of TCM.

It is effective to implement frequently accessed instruction codes in TCM.

Tightly coupled instruction master port(s): means the connection source of the memory that implements the instruction code
Tightly coupled data master port(s): refers to memory sources that implement frequently used data

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