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I am unable to assign a clock to refclk[0, 1] in Cyclone IV GX devices.
Clock/PLL
refclk[0, 1] and refclk[4, 5] in Cycloen IV GX devices can only be connected to Left Side PLL. Therefore, it is not possible to directly drive FF from this pin or input a signal to a combinational circuit.
Please refer to the document at the URL link below and Note (4) on page 13 for an explanation.
https://www.altera.com/en_US/pdfs/literature/hb/cyclone-iv/cyiv-51005.pdf
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