- Semiconductor BusinessHOME
- Products and Services of Macnica,Inc.
-
technical information
-
Events and Seminars
- Handling Manufacturer
- Support
- Inquiry
- Click here to purchase products
- Semiconductor business e-mail magazine registration
Narrow down by specifying conditions
There are currently 4332 hits.
When I simulate a design with primitives (GLOBAL, LCELL, etc.) in ModelSim-AE, the expected waveforms are not output. Please tell me the solution.
simulation
Designs using Altera primitives must register the library separately.
In this case, register "altera" (for VHDL) and "altera_ver" (for verilog-HDL) in the library and try running the simulation again.
Experienced FAE
Free consultation is available.
From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.