The PCI-Express Hard IP limitation does not prevent other channels within the same transceiver block from being used.
However, please note the following restrictions when implementing multiple system functions within the same transceiver block.

・Common reconfiguration block signals

The reconfig_clk, reconfig_togxb, and reconfig_fromgxb signals should be shared between the ALTGX inside the PCI-Epxress hard IP and the ALTGX created elsewhere.

・Common power down signal

There is a gxb_powerdown signal in the input signals of ALTGX. This signal must be common within the transceiver block.

・Common calibration clock signal

There is a cal_blk_clk signal in the input signals of ALTGX. This signal must be common within the transceiver block.

・Set the starting channel number to something other than 0

Set "What is the starting channel number?" in Reconfiguration Settings in ALTGXB settings to something other than 0.
(Because PCI-Express is set to 0, set a different value.)


Furthermore, compilation may not be possible depending on the number of clock systems and the number of transfer rate systems used.