It refers to a method of storing multiplication results in the FPGA's internal memory and obtaining specific multiplication results using a lookup table method.
(Can be constructed with the ALTMEMMULT megafunction.)

In addition to the on-board multipliers, it is configurable for various latencies and multiplier sizes.

For details, please refer to the application note (AN306) at the URL link below.

AN306: Implementing Multipliers in FPGA Devices
    https://www.altera.com/en_US/pdfs/literature/an/an306.pdf