What type of clock is used for the phase compensation FIFO in the Stratix IV GX transceiver block?

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What kind of clock is used for the phase compensation FIFO in the Stratix IV GX transceiver block?

By default, rx_clkout/tx_clkout is used for the write and read clocks of this FIFO.
can optionally select rx_coreclk/tx_coreclk (both inputs),
・ rx_coreclk : Read clock for this FIFO
・ tx_coreclk : Write clock for this FIFO
can be used as a clock transfer.

If you don't use clock domain crossing
・ RX-side logic: rx_clkout
・Logic on the TX side: tx_clkout
should be used as a clock.

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