I instantiated the Intel Triple Speed Ethernet megafunction with a GMII interface. The 125MHz transmit clock signal that connects to the PHY is an input, not an output. How can I connect the MAC and PHY while satisfying the GMII standard?

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Intel: Instantiated Triple Speed Ethernet megafunction with GMII interface. The 125MHz transmit clock signal that connects to the PHY is an input instead of an output. How can I connect MAC and PHY while meeting the GMII standard?

This can be achieved by supplying a 125MHz synchronous clock to both the MAC and PHY using an external PLL or FPGA built-in PLL.

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