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There are cases where tRISE (rise time) and tFALL (fall time) for each I/O Standard are not listed in the handbook. Is there a way to find out?

Timing constraints/analysis

You can check tRISE and tFALL in the Quartus II compilation report.
If you already have a design, try compiling it.

The confirmation method for Quartus II Ver.9.1 is shown below.

・ Input pin
For Classic Timing Analyzer
Processing ⇒ Compilation Report ⇒ Timing Analyzer ⇒ Advanced I/O Timing ⇒
Input Transition Times
10-90 Rise Time
90-10 Fall Time

For TimeQuest Timing Analyzer
Processing ⇒ Compilation Report ⇒ TimeQuest Timing Analyzer ⇒ Advanced I/O Timing ⇒
Input Transition Times
10-90 Rise Time
90-10 Fall Time

   
・ Output pin
For Classic Timing Analyzer
Processing ⇒ Compilation Report ⇒ Timing Analyzer ⇒ Advanced I/O Timing ⇒
From Signal Integrity Metrics
Select Slow Corner Signal Integrity Metrics or Fast Corner Signal Integrity Metrics
10-90 Rise Time at FPGA pin
90-10 Fall Time at FPGA pin

For TimeQuest Timing Analyzer
Processing ⇒ Compilation Report ⇒ TimeQuest Timing Analyzer ⇒ Advanced I/O Timing ⇒
From Signal Integrity Metrics
Select Slow Corner Signal Integrity Metrics or Fast Corner Signal Integrity Metrics
10-90 Rise Time at FPGA pin
90-10 Fall Time at FPGA pin
 

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