I get the following error message: Please suggest me a workaround.
<error message>
Can't place <number> pins with I/O standard because Fitter has only <number> such free pins available for general purpose I/O placement
The causes and workarounds for this message in Quartus II are:
cause
Your design uses more pins for one I/O standard than the device has.
Example 1) The number of pins for special I/O standards such as LVDS used in the design exceeds the number of pins allowed by the device.
if
Example 2) When compiling is performed for verification of the lower hierarchical design.
(because the number of ports in the lower hierarchy design may be more than the number of I/O pins in the target device)
Workaround
Please respond in one of the applicable ways.
- If the pin count exceeds the pin count allowed for the device, edit the design to reduce the pin count or change the I/O standard to adjust the pin count.
- If the above adjustment is not possible, change the target device type to one with more I/O pins.
- If you are compiling a lower layer design, set the Virtual Pin option for ports that are internal nodes (that is, ports that are not pulled out as pins to the top level layer) for the port of that entity.
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