Intel: Another device is connected on the board to the unused pins of the device whose pins are not assigned in the design. What state (attribute, level) is that pin? Do you need processing on the board?
If an unused pin of an Altera device is connected to a pin of another device, the pin of the Altera device must be in the state corresponding to the pin to which it is connected.
Setting attributes for unused pins is optionally constrained by Quartus II. However, input-only pins (for example, clock-only pins), JTAG pins, configuration pins, and PLL-related pins are special dedicated pins and cannot be configured with Quartus II options. Please do proper processing on the board.
(Example: Unused dedicated input pin ⇒ Connect to GND)
The attribute types that can be set in Quartus II are:
・ As input tri-stated
・ As output driving ground
・ As output driving vcc (Individual pin setting only)
・ As output driving an unspecified signal
・As input tri-stated with bus-hold circuitry
・As input tri-stated with weak pull-up resistor
However, MAX 3000A and 7000S/AE/B devices have fewer types to choose from due to the device structure. Also note that the bus hold and pull-up resistor functions only apply to devices that support this function.
After applying the option in Quartus II, perform board processing according to the option setting.
<< Reference Materials >>
For information on how to set options and how to handle unused clock pins, JTAG pins, etc., see the published document Quartus II Getting Started Guide - Device Unused Pin States and Their Handling.
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