The Zero Delay Buffer mode of the PLL is phase aligned to the clock input pin for zero delay through the device.
Therefore, the phase-compensated PLL clock output signal must be connected to the output pin.
 
If the error message is "PLL "" COMPENSATE_CLOCK port must feed an output pin when OPERATION_MODE is set to ZERO_DELAY_BUFFER", check the following two points.
1. Is the output of the PLL designed in Zero Delay Buffer mode connected to an I/O pin?
2. If 1. is okay, the PLL output clock connected to the I/O pin is the MegaWizard clock for phase compensation.
Is it registered in the Plug-In Manager?
⇒ To check, open the ALTPLL design in the MegaWizard Plug-In Manager.
On page 1 of 12, under "Which output clock will be compensated for?", connect to an I/O pin
Check if the PLL output clock for phase compensation specified is registered.