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Intel: How do I handle unused TEMPDIODEP/N pins on Stratix III and Stratix IV devices?
The TEMPDIODEP and TEMPDIODEN pins should be tied to GND if unused.
For details on pin information, please refer to the pin connection guidelines at the URL link below.
Stratix III: https://www.altera.com/en_US/pdfs/literature/dp/stx3/pcg-01004.pdf
Stratix IV GT: https://www.altera.com/en_US/pdfs/literature/dp/stratix4/pcg-01005.pdf
Stratix IV GX/E: https://www.altera.com/en_US/pdfs/literature/dp/stratix4/pcg-01006.pdf
Notes
Regarding Stratix III, an errata has been issued and TEMPDIODEP and TEMPDIODEN functions are not supported.
For more information on errata, please refer to the errata sheet at the URL link below.
https://www.altera.com/en_US/pdfs/literature/es/es_01026.pdf
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