Category: Quartus® Prime (Timing Constraint/Analysis)
Tools: Quartus® Prime
device:-


The TimeQuest Timing Analyzer allows you to specify timing constraints for complex clock structures such as multiplexed clocks using SDC commands.
 
For SDC descriptions for multiplexed clocks, use the "set_clock_groups" command.
If you want the clock to be recognized exclusively by the TimeQuest Timing Analyzer,
Using "set_clock_groups -exclusive" is very useful.
 
For details, please refer to the URL link below.

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/quartus/exm-tq-clock-mux.html