- Semiconductor BusinessHOME
- Products and Services of Macnica,Inc.
-
technical information
-
Events and Seminars
- Handling Manufacturer
- Support
- Inquiry
- Click here to purchase products
- Semiconductor business e-mail magazine registration
Narrow down by specifying conditions
There are currently 4332 hits.
Intel: After measuring the signal on the board, Overshoot/Undershoot above the specified value is occurring. What should I do to suppress it without changing the board?
You may want to experiment and adjust the Quartus II constraints listed below.
・ OCT
・Current Strength
If the FPGA is the receiving side
⇒ Set Parallel OCT (50Ω) at far end termination
If the FPGA is the sending side
⇒ Set the drive current adjustment (Current Strength)
Adjust sending end termination Set Series OCT (50Ω)
However, it may not be effective due to the characteristic impedance of the board or other factors.
Also, please note that the OCT setting and Current Strength setting cannot be enabled at the same time.
Experienced FAE
Free consultation is available.
From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.