Here's what you need:
1. After completing Confirutation, the input clock to the PLL is undefined
2. When the PLL locks again after the PLL has lost lock, ensure the phase relationship between the input clock and the output clock.
sea bream
⇒When the PLL locks again, the set frequency is output, but the phase relationship is not guaranteed.
3. Use PLL_Reconfig or clock switchover in your design
 
The default is ON, and it is set to use areset.
If you want to turn it off, please perform sufficient verification by the customer and change the setting.