Altera: How do I manually specify the location of the IOPLL Intel FPGA IP?

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Altera: How can I manually specify the location of the IOPLL Intel FPGA IP?

Arria Cyclone Quartus Prime Clocks/PLLs

Category: Tool
Tools: Quartus® Prime Pro Edition, Quartus® Prime Standard Edition
Devices: Arria® 10, Cyclone® 10 GX

To manually specify the location of the IOPLL Intel FPGA IP, use the Assignment Editor.

To field	IOPLL Intel FPGA IP Node Name
Assignment Name field	Location
Value column	Element:　IOPLL
Value column	Location: Specify the location where you want to place it.

You can easily specify the node name of the IOPLL Intel FPGA IP in the To field by selecting it in the following flow:

① Run Analysis & Synthesis.

② Start "Tools menu > Netlist Viewers > Technology Map Viewers (Posf-Mapping)".

③ As shown in the figure below, expand the lower module of the target IOPLL Intel FPGA IP from the Netlist Navigator located on the left side of the screen and search for "iopll_inst".

④ Right-click on "iopll_inst" > Locate Node > Locate in Assignment Editor.

⑤ Click the ▼ mark on the right side of the To field of the automatically launched Assignment Editor, and select the displayed node name (the node name specified in ④ above).
The node name is registered in the To field.

⑥ Double-click the Assignment Name column and select "Location".

⑦ Double-click the Value field, click the [...] button, and enter the following in each item of the Location dialog Box that appears:
Specify the following from the drop-down menu:
・ Element: Select IOPLL
・ Location: Specify the location you want to place it

⑧ Select File menu > Save to save the constraints.

Run compilation (Fitter) and check whether the placement specified in the Fitter report, Chip Planner, etc. was achieved.

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