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Intel: Create HDL Design File from Current File is missing from File menu > Create/Update in Quartus® Prime Pro Edition.
Category: Tools
Tools: Quartus® Prime Pro Edition
device:-
Because schematics are not an industry standard format, Quartus® Prime Pro Edition does not support converting from block design format (.BDF) to HDL (Create HDL Design File from Current File).
Also, starting with Quartus® Prime Pro Edition 23.3, .bdf is deprecated and the following error will occur when you compile .bdf.
Error(22595): Intel Quartus Prime software does not support entity "entity_path/entity_name" of type "BDF". Convert BDF files to Verilog or VHDL for continued support.
Therefore, the existing .bdf must be converted to Verilog HDL or VHDL using the workaround below.
<Workaround>
Convert BDF files to Verilog HDL or VHDL with the Create HDL Design File from Current File feature in Quartus® Prime Standard or Lite Edition.
(1) Set the project from File menu > Open Project.
*Create HDL Design File from Current File in the menu will not be enabled unless a project is set.
*If there is no existing project for Standard Edition for the .bdf to be converted, please create a dummy project for conversion.
(2) From the File menu > Open, select the .bdf to be converted to HDL and open the file.
(3) File menu > Create / Update > Create HDL Design File from Current File
(4) Select the HDL format to be converted from File type in the Create HDL Design File for Current File window that appears.
(5) Click the OK button and a Verilog HDL or VHDL file will be generated in the same folder where the .bdf file is saved.
(Notes)
Some of the generated registers or instances must be renamed to function properly.
For instructions on how to execute Create HDL Design File from Current File using a command, please refer to the FPGA Knowledge Base below.
<Related FAQ>
Create Symbol Files for Current File is missing from the Quartus® Prime Pro Edition File menu > Create / Update.
<Related FPGA Knowledge Base>
Error(22595): Intel Quartus Prime software does not support entity "entity_path/entity_name" of type "BDF". Convert BDF files to Verilog or VHDL for continued support.
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