Intel: When Arria® 10 is powered off, is there any problem if voltage is applied externally to the I/O pins and floating voltage occurs on VCCIO?

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Intel: When the Arria® 10 is powered off, is it okay to have external voltage applied to the I/O pins causing a floating voltage on VCCIO?

Arria

Category: Devices
tool:-
Device: Arria® 10

As long as you follow the guidelines given in AN 692, you should be fine.

The LVDS I/O pins do not support 'Hot-Socketing;' these LVDS I/O pins can tolerate a maximum of 10 mA per pin and a total of 100 mA per I/O bank. O pin must not exceed 1.89 V.

AN 692: Power Sequencing Considerations for Intel® Cyclone® 10 GX, Intel® Arria® 10, Intel® Stratix® 10, and Intel® Agilex™ Devices

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