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Intel: What state is each I/O pin in the Arria® 10 SoC until configuration is complete?
Category: Devices
tool:
Device: Arria® 10 SoC
See Table 325. I/O State in the document below.
・[Intel® Arria® 10 Hard Processor System Technical Reference Manual]
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_5v4.pdf#page=713
For nIO_PULLUP, see Table 2. Dedicated Configuration/JTAG Pins in the document below.
・[Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines]
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/arria-10/pcg-01017.pdf#page=7
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