Category: Timing Constraint/Analysis
Tools: Quartus® Prime
Device: MAX®10

This is possible using the MAX® 10 CLKCTRL delay adjustment feature.

Constraints are made in the Assignment Editor.
・To: Input clock signal
Assignment Name: Input Delay from Dual-Purpose Clock Pin to Fan-Out Destinations
・Value: Any value from 0 to 63 (higher value increases delay amount)
・Enable: Yes

After compiling with the above settings, check the amount of delay with the Timing Analyzer.