Category: Walkie Talkie
Tools: Quartus® Prime
Device: Cyclone® V

Datarate: 5000Mbps, FPGA fabric: 10bit, "Parallel clock frequency = 500MHz > Allowable value in Datasheet" is causing an error.

The parallel clock of Transceiver -> FPGA Fabric has frequency limitations as follows.

(Reference) Cyclone V Device Datasheet
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_51002.pdf
Table 26. Transceiver-FPGA Fabric Interface Specifications for Cyclone V GX, GT, SX, and ST Devices

Calculate the specific parallel clock frequency by A÷B.
(A) Data rate
(B) FPGA fabric / Standard TX, RX PCS interface width

The error can be avoided by increasing the bandwidth of the FPGA Fabric.