Category: External memory
tool:-
Device: Stratix® 10

・The maximum value that can be set for the settable burst length is 256.
・However, TransactionidentificationThere is a condition that the added value with the bit width of is 9 or less. The bit width of the ID is [9 bits – ceil(log2(maximum burst length)). For example, if 128 bursts are set, the connectable AXI4 ID bit width is 2 bits.
・Also, set it so that it does not exceed 4KB of the AXI4 specification.

Please refer to the following document for details.
High Bandwidth Memory (HBM2) Interface Intel® FPGA IP User Guide
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20031.pdf
(Item of AXI Burst Transactions on page 49)