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Intel: Are there any PCB design rules for Pad on Via in Intel FPGAs?
Category: Board
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For Stratix® 10 devices, please refer to AN766.
AN 766: Intel® Stratix® 10 Devices, High Speed Signal Interface Layout Design Guidelines
https://www.intel.com/content/www/us/en/docs/programmable/683132/current/devices-high-speed-signal-interface.html
(Search via-in-pad)
For other devices, please refer to AN114.
AN 114: Board Design Guidelines for Intel Programmable Device Packages
https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/an/an114.pdf
(search for "Via Capture Pad")
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