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Intel: When using PCI-Express with Stratix® 10, should I use the fPLL or the ATX PLL?
Category: PCI-Express
Tools: Quartus® Prime
Device: Stratix® 10
It depends on PCIe IP Rate, but for Gen3, both fPLL (Gen1/Gen2) and ATX PLL (Gen3) are used.
These are configured automatically when you implement the IP, and you can see their placement in the Fitter Report and Pin Planner.
Unlike Native PHY, it does not need to be placed on the design by the user.
(Reference) Intel® Stratix® 10 Avalon®-ST and Single Root I/O Virtualization (SR-IOV) Interface for PCI Express* Solutions User Guide
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_s10_pcie_avst.pdf
(Channel Layout and PLL Usage item)
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