Category: PCI-Express
Tools: Quartus® Prime
Device: Stratix® 10

For CvP, we use .periph.jic to write the Periphery image first, which contains all the PCI-Express Hard IP (PCIe HIP) information of the device.
However, please note that the PCIe HIP block that supports CvP is only on the lower left side of the device.

(reference)
Intel® Stratix® 10 Configuration via Protocol (CvP) Implementation User Guide
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-s10-cvp.pdf
(CvP System item)

Note that Stratix® 10 devices do not have an Autonomous mode setting, but it is enabled by default for all PCIe HIPs.
However, only the lower left HIP Block, which also supports CvP, can meet the 100ms PCIe spec.