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Intel: When using Remote Update Intel® FPGA IP (ALTREMOTE_UPDATE) and ASMI Parallel Intel® FPGA IP (ALTASMI_PARALLEL), do I need to connect each IP and configuration ROM by myself (pin assignment)?
Category: IP (Other)
Tools: Quartus® Prime
device:-
Ports on the Configuration ROM side are not described in symbols or top entities, but they are automatically pin-assigned when compiled with Quartus® Prime.
In the report file after compilation, you can confirm that they are assigned to the DCLK, nCSO, and ASDO pins.
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