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Intel: ModelSim® - Error loading DCFIFO during validation in Nativelink simulation environment with Intel® FPGA Edition.
<Error message>
Loading dcfifo_test.dcfifo_test_xxxxx
Error (suppressible): (vsim-10000) C:/<path>/sim/dcfifo_test.dcfifo_test_xxxxx.v(xx): Unresolved defparam reference to 'dcfifo_component' in dcfifo_component.enable_ecc.
Time: 0 ps Iteration: 0 Instance: /tb/dcfifo_test.dcfifo_test_xxxxx_component/fifo_0 File: C:/<path>/sim/dcfifo_test.dcfifo_test_xxxxx.v
Category: Simulation
Tool: ModelSim® - Intel® FPGA Edition
device:-
It seems that the VHDL library is specified when running vsim.
Remove -L altera_mf and run (load) the simulation with -L altera_mf_ver.
For Nativelink, please remove -L altera_mf in the vsim command.
Alternatively, it can be avoided by setting the output netlist in Settings > Simulation to Verilog.
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