Intel: Are there any wiring guidelines or rules for trace lengths when connecting Cyclone® V and DDR3 without fly-by connection?

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Intel: Do you have any routing guidance or rules for each trace length when connecting Cyclone® V and DDR3 without fly-by connection?

board

Category: External memory interface
tool:-
Device: Cyclone® V

The External Memory Interface (EMIF) Handbook says "Refer to DDR2 layout guidelines for non-flyby devices."
See DDR2 layout guidelines below.

External Memory Interface Handbook Volume 2: Design Guidelines
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/external-memory/emi_plan.pdf
(Search for Layout Guidelines for DDR2 SDRAM Interface.)

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