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Intel: Are there any regulations regarding the placement of termination resistors and the length of traces to termination resistors for Cyclone® V and DDRx connections?
Category: External memory interface
tool:-
Device: Cyclone® V
No specific wiring recommendations.
After terminating on the memory side before branching, it is possible to branch and wire the same length to each chip, or it is also possible to provide a termination for each memory after branching.
However, regardless of which wiring is selected, it is necessary to perform a board simulation to confirm that there are no problems.
Please refer to the following External Memory Interface (EMIF) Handbook for details on each trace length.
External Memory Interface Handbook Volume 2: Design Guidelines
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/external-memory/emi_plan.pdf
(Search for DDR2 SDRAM Layout Guidelines.)
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