Intel: I have generated and implemented the Signal Tap Logic Analyzer with IP Catalog, can I deploy it to an STP file reflecting the settings?

Quartus Prime

Category: Quartus® Prime
Tools: Quartus® Prime
device:-


After embedding Signal Tap in the design as a module and compiling, you can save the STP file that reflects the implementation contents with Save As and start it from the menu below.

File menu ⇒ Create/Update ⇒ Create SignalTap II File from Design Instance(s)

Then, after specifying the Intel® FPGA Download Cable II (USB-Blaster II) and the sof file to be downloaded, you can use it as an STP file by writing.
However, the Power-Up Trigger option found in the STP file cannot be used with the IP Catalog creation method.


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