Intel: What power supply is monitored by the POR (Power-On Reset) circuit inside the FPGA in Stratix® 10?

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Intel: What power is monitored by the POR (Power-On Reset) circuit inside the FPGA in the Stratix® 10?

Stratix Power Supply/Enpirion

Category: Specifications
tool:-
Device: Stratix® 10

The power supplies monitored by the Power-On Reset (POR) circuit in Stratix® 10 are:

VCC, VCCERAM, VCCPT, VCCADC, VCCIO_SDM, VCCBAT, VCCL_HPS

For details, please refer to the document below.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-pwr.pdf
(Search for Power-On Reset Circuitry.)

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