Intel: What is the source that can be used for the Reference Clock input to the TX PLL of the Cyclone® 10 GX transceiver?

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Intel: What are the available sources for the Reference Clock input to the Cyclone® 10 GX transceiver's TX PLL?

Cyclone IP

Category: Transceiver
Tools: Quartus® Prime
Device: Cyclone® 10 GX

The sources of the input reference clock that can be used with the Cyclone® 10 GX transceiver are as follows.

Dedicated reference clock pins
Reference clock network
The output of another fPLL with PLL cascading
Receiver input pins
Global clock or core clock

Intel® Cyclone® 10 GX Transceiver PHY User Guide
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/ug_cyclone10_xcvr_phy.pdf
(see Input Reference Clock Sources section)

If you use Jitter demanding protocols, choose Dedicated reference clock pins and use them as close as possible to the transmit PLL.

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