Category: Quartus® Prime (Platform Designer)
Tools: Quartus® Prime
device:-


No, this IP cannot be used manually by the user as it is automatically inserted by the tool when the internal bus is generated.

(Reference) Can I manually instantiate Qsys Translator IP in a Qsys system?https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/embedded/2017 /can-i-instantiate-avalon-translator-ip-in-a-qsys-system--.html

Platform Designer supports the following interfaces, and direct connection (automatic conversion) is possible between memory-mapped interfaces on Platform Designer.
(Quartus Prime v18.1)
AMBA3 AXI (version 1.0)
AMBA4 AXI (version 2.0)
AMBA4 AXI-Lite (version 2.0)
AMBA4 AXI-Stream (version 1.0)
AMBA3 APB (version 1.0)
Avalon

(reference)
Intel Quartus Prime Pro Edition User Guide: Platform Designer
https://www.intel.com/content/www/us/en/programmable/documentation/zcn1513987282935.html#mwh1409958828732
(Platform Designer Interconnect item)

Intel Quartus Prime Standard Edition User Guide: Platform Designer
https://www.intel.com/content/www/us/en/programmable/documentation/jrw1529444674987.html#mwh1409959042128
(item Designing with Avalon and AXI Interfaces)