Category: SoCs
Tool: SoC EDS
Device: Cyclone® V


When booting the Cyclone® V SoC, the preloader-mkpimage.bin that is written to the boot source such as QSPI Flash or SD card is an image (total 256KB) that combines 4 identical Preloaders (64KB) consecutively.

If a retry occurs due to a startup failure, the four Preloaders are executed in the following sequence.

1. Works with Preloader0 image
2. Preloader0 image is reset by watchdog
3. Reboot and run preloader1 image next time
4. Preloader1 image is reset by watchdog
5. Below, the same behavior for Preloader2,3
6. Preloader3 image is reset by wathdog
7. Check the FPGA Fallback function and access 0xC0000000 if it is enabled (If it is disabled, it will remain in an infinite loop and wait for Reset)
8. Reset standby state

The confirmation of the sequence can be confirmed with the following Boot ROM Code Register Group register group.
https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/hps.html#topic/sfo1410068005527.html

Each of them is easy, but you can check the status as follows.
initswstate: Whether the Preloader was successfully started (whether 0x49535756 was written)
initswlastld: Number of currently running Preloader

The FPGA Fallback function is enabled by setting the f2h_boot_from_fpga_on_failur signal of the HPS interface to High, but in order to use this signal, check Enable boot from fpga signals in the HPS option of Platform Designer (old Qsys). need to do it.