Intel: What is the maximum burst transfer size of the DMA Controller (DMA-330) built into the Hard Processor System (HPS) of the Cyclone® V SoC FPGA?

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Intel: What is the maximum burst transfer size for the DMA Controller (DMA-330) built into the Hard Processor System (HPS) of the Cyclone® V SoC FPGA?

SoC FPGAs

Category: SoCs
tool:-
Device: Cyclone® V

Maximum 256 Byte Burst.
The DMA-330's DMA channel has two burst settings: dst_burst_size and dst_burst_len.
Since the size of one burst transfer is determined by dst_burst_size × dst_burst_len, the maximum value for each item is 16 Bytes x 16 data transfers = 256 Bytes.

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