Intel: How can I confirm that the Watchdog Timer (WDT) provided as a Hard Processor System (HPS) peripheral of Arria® 10 SoC is operating?

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Intel: How can I check if the Watchdog Timer (WDT) provided as a Hard Processor System (HPS) peripheral in Arria® 10 SoC is working?

Arria SoC FPGA SoC EDS/DS-5

Category: SoCs
Tool: SoC EDS
Device: Arria® 10

Check the status of the i_watchdog_0_l4wd.wdt_cr register (Address: 0xFFD00200).

Register specifications
https://www.altera.com/hps/arria-10/hps.html#reg_soc_top/sfo1429890450363.html

If bit0(wdt_en) is 1:Enable, WDT is enabled.
By default, bit1 (rmod) is set to 0:RST, but with this setting, if the WDT times out, it will be reset, so the WDT reset operation can be confirmed by executing software that does not clear the WDT counter. can.

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