Intel: After successfully simulating in Simulink for a design using the DSP Builder Standard Blockset, when trying to convert the design to HDL using Signal Compiler, the following steps occur during the Analyze DSP Builder System stage: An error like this was output.

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Intel: After successfully simulating a design in Simulink using the DSP Builder standard blockset, when I tried to convert the design to HDL using Signal Compiler, the Analyze DSP Builder System stage gave the following error: An error like

DSP/Filter

<Error message>
Error: Failed to create Quartus Prime project topquantize in directory (project folder with mdl file)
Error: Error during compilation: Failed to create Quartus Prime project settings

Category: DSP
Tool: DSP Builder
device:-

This may be caused by Japanese characters in the Windows® user name.
Do not use Japanese characters in user names and path names in the environment where tools including DSP Builder are used.

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