Intel: What happens to burst access when the bit width of Burstcount is different between the master and slave of Platform Designer (formerly Qsys)?

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Intel: What happens to burst access when the Burstcount bit width is different between the master and slave in Platform Designer (formerly Qsys)?

platform designer

Category: Quartus® Prime / Quartus® II (Platform Designer)
Tools: Quartus® Prime / Quartus® II
device:-

The Qsys Interconnect splits the access and sends multiple burst transfers to the slave.
For example, when the master has a maximum of 16 Burst and the slave has 8 Burst, when the master accesses 16 Burst, 8 bursts are transferred to the slave twice.

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