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Intel: Where can I find the range of reference clock frequencies that the PLL will keep locking on?
Clock/PLL
Quartus Prime
Category: IP (PLL)
Tools: Quartus® Prime
device:-
Compile your design that implements the PLL and check the PLL Freq Min Lock and PLL Freq Max Lock reported in the compilation report below.
As long as the reference clock is within this range, the PLL will remain locked.
Fitter ⇒ Resource Section ⇒ PLL Usage Summary
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