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Intel: After successfully simulating in Simulink with a design using the DSP Builder standard blockset, when I tried to convert the design to HDL using Signal Compiler, during the Analyze DSP Builder System stage I got the following: error was reported. Please tell me what to do.
Category: DSP
Tool: DSP Builder
device:-
This may be caused by Japanese characters in the Windows® user name.
<Message>
Info: Analyzing Simulink model
Info: Analysis was successful
Info: Generating HDL
Info: Creating Quartus Prime Project
(Omitted)
Info: ************************************
Info: Running Quartus Prime Shell
(Omitted)
Info: Command: quartus_sh t
<Path name with double-byte characters>\generateProject1896819074759753234.tcl
-----------------------------------------------
package "tb2" isn't loaded statically
while executing
"load" "tb2"
------------------------------------------------
Error: Failed to create Quartus Prime project topquantize in directory <project folder with mdl file>
Error: Error during compilation: Failed to create Quartus Prime project settings
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