Intel: I would like to access the PHY registers using the Hard Processor System (HPS) PHY Vendor Control register (Offset 0x34). Please tell me how to control it.

Narrow down by specifying conditions

There are currently 4341 results.

Intel: I would like to access the PHY's registers using the Hard Processor System (HPS) PHY Vendor Control register (Offset 0x34).

SoC FPGAs

Category: SoCs
tool:-
Device: Cyclone® V

Please follow the steps below to access.

Write 0x0 to regaddr (Bit21-16), 0 to regwr (Bit22), and 1 to newregreq (Bit25) in the PHY Vendor Control register.
Read PHY Vendor Control register and wait for vstsdone (Bit27) to become 1
Read read data from regdata (Bit7-0)

Reference information
Cyclone® V HPS Memory Map
https://www.altera.com/hps/en_us/cyclone-v/index.html#topic/sfo1410069390310.html

Experienced FAE
Free consultation is available.

From specific product specifications to parts selection, the Company FAE will answer your technical concerns free of charge. Please feel free to contact us.

Inquiry form

Site Search