Intel: Can the SPI controller of the Cyclone® V SoC's Hard Processor System (HPS) perform transmission/reception simultaneously?

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Intel: Can the Cyclone® V SoC's Hard Processor System (HPS) SPI controller transmit/receive at the same time?

SoC FPGAs

Category: SoCs
tool:-
Device: Cyclone® V

SPI serial signals are always sent and received in both directions (both MISO/MOSI directions) at the same time.
In addition, the handling of sent and received serial data can be changed according to the TMOD specification.

Transmit and Receive (TMOD = 0): Both transmit and receive data are valid
Transmit Only (TMOD = 1): Receive data ignored
Receive Only (TMOD = 2): Transmit data is invalid (dummy data is sent)

Reference information
Cyclone® V Hard Processor System Technical Reference Manual
https://www.altera.com/en_US/pdfs/literature/hb/cyclone-v/cv_5v4.pdf
(Search for Master SPI and SSP Serial Transfers.)

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