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Intel: Regarding PCI-Express (PCIe) Autonomous Mode on Arria® 10 FPGA, what is the minimum amount of configuration data that must be sent to enable Autonomous Mode and meet PCIe 100ms?

Arria PCI Express

Category: PCI-Express
tool:-
Device: Arria® 10


When Autonomous is enabled, Hard IP (HIP) setting (IOCSR) is written as configuration data first, HIP operates when IOCSR configuration is completed, and Configuration Request Retry Status (CRS) is returned to the host. To do.
Check the documentation for the IOCSR bit size.

Reference information
https://www.altera.com/en_US/pdfs/literature/hb/arria-10/a10_datasheet.pdf

Below is a calculation example.

Assuming the FPGA used is a GX1150, the IOCSR is 2,756,096.
Assuming AS mode (EPCQ-L512 or higher density) is used with this device,

When setting DCLK frequency = 100MHz (because Typical Frequency = 60MHz, Minimun Frequency = 42MHz) Apply Minimum Frequency,
2,756,096bit x (23.8ns/4) = 16.4ms

For DCLK frequency = 50MHz setting,
2,756,096bit x (47.6ns / 4) = 32.8ms

That's the calculation.
Please use the result of this calculation as one index.

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